A 1.1-to-2.7 GHz CMOS Power Amplifier with Digitally-Reconfigurable-Impedance Matching-Network (DRIMN) for Wideband Performance optimization

Abstract

This paper presents a wideband CMOS power amplifier (PA) with Digitally-Reconfigurable-Impedance-Matching-Network (DRIMN), which is utilized to tune the impedance of the PA and also to optimize its performances across the frequency. The proposed DRIMN-PA is employed at the input, interstage, and output matching networks to establish a complete impedance tuning mechanism at all stages of the PA. The DRIMN mechanism comprises switching capacitors and inductors controlled via digital switching bits. The tuning property of the tunable inductor is executed via switching of multiple secondary windings employed between the turns of the inductor’s winding. The tunable inductor is designed area-efficiently in which the secondary windings do not consume a large area on-chip. The DRIMN-PA is fabricated in CMOS 130 nm process and has an operating bandwidth of 1.6 GHz from 1.1 to 2.7 GHz. It delivers a maximum output power of 27.5 to 28.5 dBm with a peak PAE of34 to 40% after tuning the RDIMN mechanism. The DRIMN-PA is also measured with a 20 MHz LTE modulated signal in which the attained linear output power and PAE are 23.3 to 24.8 dBm and 33 to 38%.