An optimized GSDG MOSFET design for nanoscale circuit applications

Abstract

In this paper, the key electrical parameters behavior of Gate Stack Double Gate (GSDG) MOSFET are studied and optimized using multi-objective genetic algorithms (MOGAs) for nanoscale CMOS-based applications. The transconductance and the OFF-current are the key electrical parameters which have been determined by the analytical explicit expressions in saturation and subthreshold regions. The optimized design is used to investigate and demonstrate the impact of the proposed technique on the nanoelectronic devices. In this context, we proposed to investigate the electrical performance of the both circuits, the ring oscillator and the inverter gate, in order to demonstrate the efficiency of the proposed method on the integrated circuit design. In this study an important improvement of the oscillation frequency and gain voltage have been recorded. The obtained results make the proposed design an alternative solution for nanoelectronics applications.