A novel simulation testbed for space-time signal processor of smart antenna system based on HILS technology

Abstract

A novel simulation testbed based on HILS (hardware-In-the-loop simulation) technology is described for space-time signal processing in a TDMA anti-jamming smart antenna receiver system. The testbed serves the space-time signal processor as a powerful and effective tool in its verification and debugging. The function and target of the simulation testbed is analyzed first. The architecture of this testbed and the implementation of each sub-system are then detailed. Some key technologies are also presented.