Electrothermal RRAM Crossbar Improvement with 3-D CRS and 1D1R-1R1D Architectures

K. Lahbacha, H. Belgacem, W. Dghais, F. Zayer, A. Maffucci
{"title":"Electrothermal RRAM Crossbar Improvement with 3-D CRS and 1D1R-1R1D Architectures","authors":"K. Lahbacha, H. Belgacem, W. Dghais, F. Zayer, A. Maffucci","doi":"10.1109/DTS52014.2021.9498259","DOIUrl":null,"url":null,"abstract":"This paper presents one-diode-one resistor-one-resistor-one-diode (1D1R-1R1D) based Resistive Random Access Memory (RRAM) crossbar architecture and introduces the Complementary Resistive Switching (CRS) structure as alternative improved strategies for the electrothermal RRAM integration. Signal integrity issue is mitigated by using the CRS topology. The CRS based RRAM integration as a single memory cross-point cell avoids the need for extra elements (i.e., diodes, transistors...) which in turn facilitates the prototyping process and increases the data stored in the targeted cross-point device. On the other hand, the alternative 1D1R-1R1D, compared to the 1D1R structure provides a new arrangement for diodes and memory cells, which allows resistive switching for the entire crossbar array. The proposed architecture leads to 2x memory density improvement with the same polarization conditions by rectifying the reverse integration of the diodes.","PeriodicalId":158426,"journal":{"name":"2021 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTS52014.2021.9498259","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

This paper presents one-diode-one resistor-one-resistor-one-diode (1D1R-1R1D) based Resistive Random Access Memory (RRAM) crossbar architecture and introduces the Complementary Resistive Switching (CRS) structure as alternative improved strategies for the electrothermal RRAM integration. Signal integrity issue is mitigated by using the CRS topology. The CRS based RRAM integration as a single memory cross-point cell avoids the need for extra elements (i.e., diodes, transistors...) which in turn facilitates the prototyping process and increases the data stored in the targeted cross-point device. On the other hand, the alternative 1D1R-1R1D, compared to the 1D1R structure provides a new arrangement for diodes and memory cells, which allows resistive switching for the entire crossbar array. The proposed architecture leads to 2x memory density improvement with the same polarization conditions by rectifying the reverse integration of the diodes.
基于3-D CRS和1D1R-1R1D架构的电热RRAM横条改进
本文提出了一种基于一二极管-一电阻-一电阻-一二极管(1D1R-1R1D)的电阻随机存取存储器(RRAM)交叉结构,并介绍了互补电阻开关(CRS)结构作为电热RRAM集成的替代改进策略。信号完整性问题通过使用CRS拓扑得到缓解。基于CRS的RRAM集成作为单个存储交叉点单元避免了对额外元件(即二极管,晶体管…)的需求,这反过来又促进了原型制作过程并增加了存储在目标交叉点器件中的数据。另一方面,与1D1R结构相比,可选的1D1R- 1r1d结构为二极管和存储单元提供了一种新的排列方式,允许整个交叉棒阵列的电阻开关。该架构通过整流二极管的反向集成,在相同极化条件下将存储密度提高了2倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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