{"title":"Algorithm and architecture: for non-linear noise filtering via piecewise linear compression","authors":"K. Konstantinides, B. Natarajan","doi":"10.1109/ICASSP.1994.389618","DOIUrl":null,"url":null,"abstract":"We present a novel non-linear filtering technique for random noise, based on the principle that random noise is hard to compress. In contrast to spectral filters, the proposed technique does not require a priori knowledge of the noise and signal characteristics. We demonstrate the technique by filtering additive random noise using a compression algorithm based on piecewise linear approximation. A single chip design of the filtering algorithm is also presented. It includes two multiplier-accumulator units, an adder, registers, and a short look-up table. The proposed implementation allows an output sample to be generated every four cycles on average.<<ETX>>","PeriodicalId":290798,"journal":{"name":"Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-04-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASSP.1994.389618","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
We present a novel non-linear filtering technique for random noise, based on the principle that random noise is hard to compress. In contrast to spectral filters, the proposed technique does not require a priori knowledge of the noise and signal characteristics. We demonstrate the technique by filtering additive random noise using a compression algorithm based on piecewise linear approximation. A single chip design of the filtering algorithm is also presented. It includes two multiplier-accumulator units, an adder, registers, and a short look-up table. The proposed implementation allows an output sample to be generated every four cycles on average.<>