A Half-Bridge LLC Converter: Design Notes and Simulation Challenges in PLECS

Abstract

In this paper the design notes for a half-bridge LLC dc-dc converter and simulation challenges in software PLECS are presented. The given design notes were targeted at readers who do not have previous experience with the LLC converter. The PLCES simulation challenges were: how to simply model specific analog control IC for closed-loop operation and how to provide the "switching frequency vs. time" waveforms. Key to solution of the first challenge was to model only the VCO section and minimum needed IC pins so that one could execute closed-loop simulations. This approach was verified by simulation of the 600 W half-bridge LLC converter. In addition, the "frequency vs. time" measurement block in PLECS was custom-made and, for the first time, measurements of "switching frequency vs. time" of a LLC converter were presented.