{"title":"New asymmetrical commutation cell for multilevel inverters with reduced number of components","authors":"M. Vizheh, M. Rezanejad, Emad Samadaei","doi":"10.1109/PEDSTC.2016.7556854","DOIUrl":null,"url":null,"abstract":"This paper proposes a new topology of multilevel inverters with asymmetrical commutation cell that consists of three sources and six switches to synthesize asymmetrical output voltage level. This category of topologies is typically used in voltage AC generation. The structure provides multilevel waveform utilizing reduced number of components as compared to the conventional topologies. The performance and operation of the proposed inverter is introduced in two modes: 1) six level asymmetrical, 2) eleven level symmetrical output voltage. A comparison between the proposed and conventional structures is established. The proposed inverter is simulated in MATLAB/Simulink software. To validate proper operation of the proposed circuit, experimental setups are implemented in the laboratory in two modes.","PeriodicalId":307121,"journal":{"name":"2016 7th Power Electronics and Drive Systems Technologies Conference (PEDSTC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 7th Power Electronics and Drive Systems Technologies Conference (PEDSTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PEDSTC.2016.7556854","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
This paper proposes a new topology of multilevel inverters with asymmetrical commutation cell that consists of three sources and six switches to synthesize asymmetrical output voltage level. This category of topologies is typically used in voltage AC generation. The structure provides multilevel waveform utilizing reduced number of components as compared to the conventional topologies. The performance and operation of the proposed inverter is introduced in two modes: 1) six level asymmetrical, 2) eleven level symmetrical output voltage. A comparison between the proposed and conventional structures is established. The proposed inverter is simulated in MATLAB/Simulink software. To validate proper operation of the proposed circuit, experimental setups are implemented in the laboratory in two modes.