Screening of Integrated GaAs Stacked-FET Power Amplifiers

Abstract

The manufacturing of radar front-ends is preferably performed with components that are fully tested and known to be functional. This decreases the chances of instant failure or rapid degradation of the system. Complete testing of the RF-performance of the individual MMICs, however, is not always possible due to technical, infrastructural or financial limitations. A good alternative is the screening of several DC parameters that are relevant for a reliable operation. Commonly used parameters for this DC-screening are the pinch-off voltage and off-state breakdown voltage of the transistors. To measure these parameters on all transistors, access is required to the gate, drain and source terminals of these transistors. In a Stacked-FET amplifier not all transistors terminals are directly accessible via DC pads and the inclusion of extra pads will result in a significantly larger layout. The goal therefore is to measure the DC behaviour without the need for extra DC pads. In this article methods are developed to support this goal.