Cache-aware Sparse Patterns for the Factorized Sparse Approximate Inverse Preconditioner

Sergi Laut, R. Borrell, Marc Casas
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引用次数: 2

Abstract

Conjugate Gradient is a widely used iterative method to solve linear systems Ax=b with matrix A being symmetric and positive definite. Part of its effectiveness relies on finding a suitable preconditioner that accelerates its convergence. Factorized Sparse Approximate Inverse (FSAI) preconditioners are a prominent and easily parallelizable option. An essential element of a FSAI preconditioner is the definition of its sparse pattern, which constraints the approximation of the inverse A-1. This definition is generally based on numerical criteria. In this paper we introduce complementary architecture-aware criteria to increase the numerical effectiveness of the preconditioner without incurring in significant performance costs. In particular, we define cache-aware pattern extensions that do not trigger additional cache misses when accessing vector x in the y=Ax Sparse Matrix-Vector (SpMV) kernel. As a result, we obtain very significant reductions in terms of average solution time ranging between 12.94% and 22.85% on three different architectures - Intel Skylake, POWER9 and A64FX - over a set of 72 test matrices.
分解稀疏近似逆预条件的缓存感知稀疏模式
共轭梯度法是求解矩阵a为对称正定线性方程组Ax=b的一种广泛应用的迭代方法。其有效性部分依赖于找到一个合适的前置条件来加速其收敛。分解稀疏近似逆(FSAI)预调节器是一个突出且易于并行化的选择。FSAI预条件的一个基本要素是其稀疏模式的定义,它约束了逆a -1的逼近。这个定义通常是基于数值标准的。在本文中,我们引入了互补的体系结构感知准则来提高预调节器的数值有效性,而不会产生显著的性能成本。特别是,我们定义了缓存感知模式扩展,当访问y=Ax稀疏矩阵向量(SpMV)内核中的向量x时不会触发额外的缓存丢失。结果,在一组72个测试矩阵中,我们在三种不同的架构(Intel Skylake、POWER9和A64FX)上获得了非常显著的平均解决时间减少,减少幅度在12.94%到22.85%之间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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