Preliminary Evaluation for Multi-domain Spike Coding on Memcapacitive Neuromorphic Circuit

Abstract

Neuromorphic computing aims at both accelerating machine learning computation and reducing its power consumption by adopting the hardware architecture of Spiking Neural Network (SNN), which is more biologically plausible than Artificial Neural Network (ANN). Rate coded SNNs, which represent signals according to the frequency of spikes, are highly compatible with ANNs and can utilize the technology accumulated in recent years. However, rate coded SNNs using a large number of spikes suffer from long latency and increased power consumption, and the search for a more efficient coding method has become active. In this study, we propose a novel coding scheme that uses not only the frequency of spikes but also the voltage amplitude and time width of spikes, which are domains that have not been used in conventional SNNs. The proposed multi-domain neural coding can be expected to increase the amount of information that can be transmitted per spike compared to ordinary rate coding. In addition, conductance-based synaptic devices/circuits like memristor have been widely studied, but current-based synaptic operations consume a lot of power. In this work, we employed memcapacitor and charge-pump based synapse circuit, which is a voltage-domain synaptic operation that ideally consumes power only during switching. We have performed a preliminary evaluation for the proposed coding scheme on a synaptic/neuron circuit designed in a ROHM 180nm CMOS process by simulating the operation on HSPICE. Moreover it was demonstrated that the proposed circuit can successfully perform synaptic operations to allow the new coding scheme.