Improving energy efficiency by transparently sharing SIMD Execution Units in Assymetric Multicores

Abstract

Single-ISA Asymmetric multicore architectures (e.g., ARM big.LITTLE) combine high-performance and energy efficiency in the same chip by providing different microarchitectures so the applications can transparently migrate from one to another accordingly. However, in such architectures, the big core features resource-expensive Execution Units (EU) to support ISA extensions, such as SIMD and FP, which may rarely be used depending on the application at hand. These same extensions are supported by the little core but using power-efficient EUs. Given that, in this work, we propose a decoupled offloading mechanism to allow the big core to use such power-efficient EUs in the little core while its own can be power-gated, maintaining the original migration transparency of the architecture. Since applications may have different phases, thus having more or fewer extension instructions usage, we also propose an arbiter to decide when to activate the decoupled offloading at runtime. We evaluate our technique considering ARM NEON as the ISA extension and ARM A7 and A15 as the little and big cores, respectively. Our evaluation shows that, on average, our approach provides 15.9% in energy improvements at the cost of 2.2% in time overhead for mibench benchmarks, which represent embedded application workloads; and, on average, 6.4% in energy gains at the cost of 1.1% in time overhead for polybench benchmarks, which have high NEON usage.