{"title":"A Microcontroller with IEEE1588 Support","authors":"S. Blixt","doi":"10.1109/ISPCS.2007.4383784","DOIUrl":null,"url":null,"abstract":"A compact module for networked device control is presented, focusing on its IEEE1588 FTP support. Its processor has an unusually big control store, and implements Java- and C-oriented instruction sets that also contain special instructions for compute-intensive algorithms. It is partly writable, allowing Imsys to develop efficient microcode for special sequences and processes and thus reduce the use of clock cycles and memory bandwidth and thereby save power and cost. The chip contains a dual Ethernet MAC and a timer system both of which are tightly controlled by microcode and designed to produce timestamps, which are then processed by microcode. Software on the module includes RTOS, file system, TCP/IP stack, and a 3rd-party PTP Protocol Engine.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPCS.2007.4383784","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A compact module for networked device control is presented, focusing on its IEEE1588 FTP support. Its processor has an unusually big control store, and implements Java- and C-oriented instruction sets that also contain special instructions for compute-intensive algorithms. It is partly writable, allowing Imsys to develop efficient microcode for special sequences and processes and thus reduce the use of clock cycles and memory bandwidth and thereby save power and cost. The chip contains a dual Ethernet MAC and a timer system both of which are tightly controlled by microcode and designed to produce timestamps, which are then processed by microcode. Software on the module includes RTOS, file system, TCP/IP stack, and a 3rd-party PTP Protocol Engine.