A real-time VLSI architecture for direct kinematics

V. Seshadri
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引用次数: 5

Abstract

A real-time direct kinematics algorithm has been implemented on a general-purpose signal processor. The implementation features fixed-point calculation and on-chip generation of sinusoidal functions. It is based on a parallel, pipelined architecture including a 16*16 multiplier and two 36-bit accumulators. Various algorithms are used for sinusoidal computations to trade off speed against memory usage. The algorithms have been both simulated and run on the actual hardware. The results indicate that the direct kinematics solution is obtained in under 10 microseconds with a 16-bit resolution. This amounts to a speed improvement of three orders of magnitude compared to execution on a conventional 16-bit microprocessor.
直接运动学的实时VLSI体系结构
在通用信号处理器上实现了一种实时直接运动学算法。该实现具有定点计算和片上正弦函数生成的特点。它基于并行的流水线架构,包括一个16*16乘法器和两个36位累加器。正弦计算使用各种算法来权衡速度和内存使用。这些算法已经在实际硬件上进行了仿真和运行。结果表明,直接运动学解在10微秒内得到,分辨率为16位。与传统的16位微处理器相比,这相当于速度提高了三个数量级。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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