Grain and Trivium ciphers implementation algorithm in FPGA chip and AVR micro controller

Abstract

Trivium and Grain stream cipher was developed for hardware application with high performance and limited gate, memory and power in eSTREAM project. The main propose of this project is designing high secure stream cipher in secure hardware and software application. In this paper Grain and Trivium ciphers implementation in FPGA chip and Trivium cipher algorithm in AVR microcontroller was studied and their result (such as required memory of chip and microcontroller and speed) was compared.