{"title":"Stabilization of integral plus dead-time processes by digital PI controller","authors":"A. Madady, H. Reza-Alikhani","doi":"10.1109/CCA.2013.6662846","DOIUrl":null,"url":null,"abstract":"This paper investigates the problem of stabilizing integral plus dead-time (IPDT) processes using a digital PI controller. For handling the problem without loss of generality it is assumed that the ratio of process time-delay to the system sampling period is an integer number, say n. It is observed that the degree of closed-loop system characteristic polynomial is n +2. Since n is typically a large number the usual stability test techniques, which are used in delay-free digital control systems, are not utilizable to solve the underlying problem. Therefore a graphical method that is similar to the D-partition technique is presented to solve the problem. Numerical example is given to illustrate the ability of the proposed method.","PeriodicalId":379739,"journal":{"name":"2013 IEEE International Conference on Control Applications (CCA)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Conference on Control Applications (CCA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCA.2013.6662846","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper investigates the problem of stabilizing integral plus dead-time (IPDT) processes using a digital PI controller. For handling the problem without loss of generality it is assumed that the ratio of process time-delay to the system sampling period is an integer number, say n. It is observed that the degree of closed-loop system characteristic polynomial is n +2. Since n is typically a large number the usual stability test techniques, which are used in delay-free digital control systems, are not utilizable to solve the underlying problem. Therefore a graphical method that is similar to the D-partition technique is presented to solve the problem. Numerical example is given to illustrate the ability of the proposed method.