Effect of Sorting Algorithms on High-level Synthesized Image Processing Hardware

Abstract

Image processing methods can be broadly classified into hardware and software processing. Hardware is suitable for embedded systems because of its high performance and low power consumption. In hardware development, high-level synthesis is often used because of its ease of development. However, in order to generate high-performance hardware, it is necessary to write at the software level, considering the configuration of the hardware. Since sorting algorithms are often used inside image processing, it is necessary to generate high-performance sorting algorithm hardware. In previous research, methods for generating high-performance sorting hardware using high-level synthesis and performance comparisons have been conducted, but no comparison has been made for image processing as a whole. In this study, we will examine the dynamic background subtraction method, which is an image processing method that uses sorting algorithms. As a result, it was found that simple algorithms such as bubble sort and odd-even sort can realize pipeline processing, which is a feature of hardware, and produce high-performance image processing hardware.