Static Block Floating-Point Quantization for Convolutional Neural Networks on FPGA

Hongxiang Fan, Gang Wang, Martin Ferianc, Xinyu Niu, W. Luk
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引用次数: 7

Abstract

Convolutional neural networks (CNNs) have been widely applied in various computer vision and speech processing applications. However, the algorithmic complexity of CNNs hinders their deployment in embedded systems with limited memory and computational resources. This paper proposes static block floating-point (BFP) quantization, an effective approach involving Kullback-Leibler divergence, to determine the static shared exponents. Without need for retraining, the proposed approach is able to quantize CNNs to 8 bits with negligible accuracy loss. An FPGA-based hardware design with static BFP quantization is also proposed. Compared with 8-bit integer linear quantization, our experiments show that the hardware kernel based on static BFP quantization can achieve over 50% reduction in logic resources on an FPGA. Based on static BFP quantization, a tool implemented in the PyTorch framework is developed, which can automatically generate optimised configuration according to user requirements for given CNN models, where the entire optimization process takes only a few minutes on an Intel Xeon Silver 4110 CPU.
基于FPGA的卷积神经网络静态块浮点量化
卷积神经网络(cnn)在各种计算机视觉和语音处理应用中得到了广泛的应用。然而,cnn算法的复杂性阻碍了其在内存和计算资源有限的嵌入式系统中的部署。本文提出了静态块浮点量化方法,这是一种利用Kullback-Leibler散度确定静态共享指数的有效方法。在不需要再训练的情况下,该方法可以将cnn量化到8位,精度损失可以忽略不计。提出了一种基于fpga的静态BFP量化硬件设计方案。与8位整数线性量化相比,我们的实验表明,基于静态BFP量化的硬件内核可以在FPGA上减少50%以上的逻辑资源。基于静态BFP量化,开发了一个在PyTorch框架中实现的工具,该工具可以根据给定CNN模型的用户需求自动生成优化配置,其中整个优化过程在Intel至强Silver 4110 CPU上只需几分钟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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