A 2GSPS 8-bit ADC with digital foreground calibration technology

Abstract

A high-speed 8-bit analog-to-digital converter in 0.35µm BiCMOS process technology is presented. The ADC uses the unique folding and interpolating architecture and the dual-channel timing interleave multiplexing technology to achieve a sampling rate of 2GSPS. In case of digital calibration, as a result of testing, the ADC achieves 7.32ENOB at analog input of 484MHz, and 7.1ENOB at Nyquist input after the chip is self-corrected.