Design of stable SRAM cells based on Schmitt Trigger

Hossein Rasekh, Mohsen Sadeghi, A. Golmakani, Maaruf Ali
{"title":"Design of stable SRAM cells based on Schmitt Trigger","authors":"Hossein Rasekh, Mohsen Sadeghi, A. Golmakani, Maaruf Ali","doi":"10.1109/MECO.2014.6862690","DOIUrl":null,"url":null,"abstract":"The predominant concern for SRAM cell designers is stability for nano-scaled technology due to the reduction in power supply voltages. We propose two novel SRAM cells, based on the Schmitt Trigger at 65 nm feature size in CMOS. This achieves 4–5.35 times higher read static noise margin (VDD = 350 mV) compared to the conventional 6T cell design. It also provides the much desired greater enhancement in stability compared with three other reported SRAM cell designs.","PeriodicalId":416168,"journal":{"name":"2014 3rd Mediterranean Conference on Embedded Computing (MECO)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 3rd Mediterranean Conference on Embedded Computing (MECO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MECO.2014.6862690","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

Abstract

The predominant concern for SRAM cell designers is stability for nano-scaled technology due to the reduction in power supply voltages. We propose two novel SRAM cells, based on the Schmitt Trigger at 65 nm feature size in CMOS. This achieves 4–5.35 times higher read static noise margin (VDD = 350 mV) compared to the conventional 6T cell design. It also provides the much desired greater enhancement in stability compared with three other reported SRAM cell designs.
基于Schmitt触发器的稳定SRAM单元设计
由于电源电压的降低,SRAM电池设计人员主要关注的是纳米级技术的稳定性。我们提出了两种新的SRAM单元,基于65纳米特征尺寸的CMOS施密特触发器。与传统的6T电池设计相比,这实现了4-5.35倍的读取静态噪声裕度(VDD = 350 mV)。与其他三种SRAM单元设计相比,它还提供了更理想的稳定性增强。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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