FPGA transceiver for space environment

Abstract

FPGA structures have the advantage over analog solutions in weight, dimensions and power consumption. Four elements of digital transceiver were implemented in FPGA: scrambler, Reed-Solomon coder, RS decoder and FIR filter. They were simulated in Quartus, Simulink and Modelsim environments. Finally the blocks were linked together into one fully digital transmitter and receiver. The modulator and demodulator were designed with IPcores from Altera. The whole design was implemented and tested on Altera Stratix-II DSP Development Board.