10.1 A 1.1W/mm2-power-density 82%-efficiency fully integrated 3∶1 Switched-Capacitor DC-DC converter in baseline 28nm CMOS using Stage Outphasing and Multiphase Soft-Charging

Abstract

Over the past years, delivering power to integrated circuits has become increasingly difficult. With the current intake of many modern-day applications growing each new process generation, the Power Delivery Network (PDN) losses have increased as well. By integrating a DC-DC converter together with the load, part of the required voltage conversion can be realized on-chip, and the current intake, together with the PDN losses, can thus ideally be reduced by its Voltage Conversion Ratio (VCR). In order to be viable, though, the converter must 1) have a high efficiency and VCR such that its losses are smaller than the reduction of PDN losses, 2) limit the area overhead by achieving high power density and 3) rely only on commonly available devices to enable wide-spread use.