Optimized Parallel Prefix Sum Algorithm on Optoelectronic Biswapped-Torus Architecture

Abstract

The Biswapped-Torus is a recently reported optoelectronic node-symmetrical member of Biswapped-framework family. In this paper,optimized parallel approach is presented for prefix sum computation on [Formula: see text] Biswapped-Torus. The proposed parallel algorithm demands total 7[Formula: see text] electronic and three optical moves on odd network size or 7[Formula: see text] electronic and three optical moves on even network size. The algorithmic performance of the suggested parallel algorithm is also compared with the performances of recently reported optimal prefix sum algorithms on [Formula: see text] Biswapped-Mesh and [Formula: see text]-dimensional Biswapped Hyper Hexa-cell. Based on the comparative analysis, Biswapped-Torus claims to map prefix sum faster that require fewer communication moves compared to the Grid-based traditional architecture of biswapped family named Biswapped-Mesh. Moreover, the former also has architectural benefit of node-symmetry that leads to advantages such as easy embedding, mapping and designing of routing algorithms. Compared to symmetrical counter-part of biswapped family named Biswapped-Hyper Hexa-Cell, Biswapped-Torus is cost-efficient, but requires comparatively more communication moves for mapping prefix sum.