False lock to phase lock bifurcation in a PLL

Abstract

New results are given on the phenomenon of false lock in second order, type-I phase-locked loops (PLLs). Of interest here is the behavior of a stable false lock state as a function of closed-loop gain, and the value of gain at which this state undergoes bifurcation and the loop locks-up. The results show that the DC component in the output of the loop's quadrature detector is proportional to a characteristic exponent of a variational equation obtained from the PLL's dynamics. This DC component can be used to determine how near the false-locked loop is to achieving phase lock. A numerical method is given for calculating the value of closed-loop gain at which false lock breaking bifurcation takes place and phase lock-up occurs. The results are applied to a simple example, and a comparison is made with an existing approximate method.