Direct Digital Modulation and RFDAC for Generation of Frequency Ramps in FMCW Radar

Soumya Krishnapuram Sireesh, Sanaz Hadipour Abkenar, N. Christoffers, C. Wagner, A. Stelzer
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Abstract

The frequency chirps applied in frequency modulated continuous wave (FMCW) radars are typically generated using a PLL imposing trade-offs between noise and modulation accuracy. We are removing this compromise by employing a fixed frequency PLL, direct digital chirps generation and up-conversion to RF using an RFDAC. With a simplified PLL requirement and better exploitation of nm-scale CMOS digital performance, we achieve lower noise, less chip area, and frequency error, and remove the issues with frequency ramp non-linearities in conventional FMCW architectures.
直接数字调制和RFDAC用于FMCW雷达频率坡道的产生
调频连续波(FMCW)雷达中的频率啁啾通常使用锁相环产生,在噪声和调制精度之间进行权衡。我们通过采用固定频率锁相环、直接数字啁啾产生和使用RFDAC上变频到RF来消除这种折衷。通过简化的锁相环要求和更好地利用纳米级CMOS数字性能,我们实现了更低的噪声,更小的芯片面积和频率误差,并消除了传统FMCW架构中的频率斜坡非线性问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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