Cancellation of Power-Gate Mutual Inductance for Crosstalk Voltage Alleviation in SiC MOSFET Multi-chip Power Modules

Abstract

The crosstalk issue in SiC MOSFET multi-chip power modules (MCPMs) is caused by both the capacitive and inductive couplings between the power loop and the gate loop. Compared to the capacitive ones, the inductive couplings introduced by layout traces reveal a contradictory effect under the low-impedance gate loop design, thus limiting the suppression effectiveness of active clamping. To alleviate this issue and suppress the inductive crosstalk from the origin, this paper proposes a cancellation layout structure to reduce the inductive power-gate couplings. At first, the fully-coupled inductance model for MCPMs is developed after analyzing the crosstalk mechanism considering inductive coupling. Then, based on the model, a coupling cancellation structure is designed by introducing the gate trace with the negative mutual inductance. As a result, the cancellation structure is compact, flexible, and easy to implement. Finally, simulations and experiments are conducted to verify the effectiveness of the proposed technique.