A Hardware-efficient TSV Repair Scheme Based on Butterfly Topology

Abstract

Three dimensional integrated circuits (3D ICs) have been proposed as a solution for the limitation of microfabrication technology. However, through-silicon via (TSV), which connects two different dies vertically, may fail, and it can decrease the yield of 3D-ICs. A novel TSV repair architecture to repair defect TSVs is proposed in this paper. By shifting the corresponding signals of the faulty TSVs vertically and diagonally to the non-faulty TSVs, the proposed method maintains repair rate of TSV to 88.6% when there are 8 faulty TSVs. The hardware area of MUXs in proposed method is 193.6μm² while that of the previous work is 245.8spl mu/m² and 297.9 spl mu/m².