Low Power CMOS 8:1 Injection-Locked Frequency Divider with LC Cross-Coupled Oscillator

Sehyuk Ann, Junho Yu, Jusang Park, Yongsik Kim, Namsoo Kim
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引用次数: 4

Abstract

This paper proposes a high performance frequency divider which is composed of injection-locked frequency divider (ILFD) and current-mode logic (CML) frequency divider. The multiple-block divider is to obtain the broad-band and high frequency operation in phase-locked loop (PLL). ILFD has a similar structure with LC cross-coupled oscillator which operates at 20 GHz. 3 stages of ILFD are supposed to provide the operation of divide-by-8 (/8) with low power consumption and are to adjust the frequency alignment with the LC cross-coupled oscillator. CML frequency divider which is used as the 2nd block of divider applies an inductive peaking structure in order to increase the bandwidth. The proposed frequency divider which has the /8 ILFD and /32 CML frequency divider is integrated with 0.18 μm CMOS process and operates in the conventional PLL. Simulation test shows the low power consumption of 13.2 mW at the input frequency of 20 GHz.
低功耗CMOS 8:1注入锁定分频器与LC交叉耦合振荡器
本文提出了一种由注入锁定分频器(ILFD)和电流模式逻辑分频器(CML)组成的高性能分频器。多块分频器是为了实现锁相环的宽带高频工作。ILFD具有与LC交叉耦合振荡器相似的结构,其工作频率为20 GHz。3级ILFD应提供低功耗的除以8(/8)运算,并与LC交叉耦合振荡器调节频率对准。作为分频器第二块的CML分频器采用感应峰值结构,以增加带宽。该分频器具有/8 ILFD和/32 CML分频器,集成了0.18 μm CMOS工艺,在传统锁相环中工作。仿真测试表明,在输入频率为20 GHz时,功耗低至13.2 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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