Low Latency PDM-to-PCM Decoder

Abstract

The output from a digital Micro-Electrical- Mechanical System (MEMS) microphone in the form of PDM often needs to be converted to PCM before further processing, as PCM signals are easier to analyze. The current hardware-based PDM-to-PCM converters uses cascaded integrator-comb (CIC) based and finite impulse response (FIR) filters, which result in high hardware utilization to achieve a high signal-to-noise ratio (SNR). To strike a balance between performance and power consumption, a one-dimensional convolutional neural network (1D-CNN) has been applied in a PDM-to-PCM converter. Although this method resolves the aforementioned issues, an improvement to the system latency and throughput is possible. This paper proposes a fast method for a hardware-based PDM-to-PCM converter by cascading a digital low-pass filter and an existing ID-CNN-based low-pass filter. The approximation results show that the output PCM signal has the mean absolute error (MAE) of only 0.0026 compared to the original PCM signal. The proposed method has been implemented on the Xilinx PYNQ-ZI field programmable gate array (FPGA). While there is a slight increase in hardware utilization due to an additional required hardware, the latency has improved by 61% compared to the existing ID-CNN-based PDM-to-PCM converter. This research reduces the time taken to process each PCM data from PDM in a hardware-based system.