MULTIPAR: an output queue ATM modular switch with multiple phases and replicated planes

Jian Ma, K. Rahko
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引用次数: 1

Abstract

The authors propose a novel output queuing ATM modular switch which has memoryless two-stage interconnection with disjoint-path topology. The goal of achieving the modular switch is to relax the limitation of VLSI implementation, to simplify interstage wiring and synchronization, furthermore to reduce complexity of the overall switch. A pure output queue is constructed by providing multipath in each output port and replicated switching module planes. The switch with certain cell loss requirement can be ensured by choosing a suitable path set of L/sub 1/ and L/sub 2/. For instance, cell loss probability in the switch can be kept less than 10/sup -6/ for various N, under 90% load, if a set of L/sub 1/=9 and L/sub 2/=4 (or L/sub 1/=8 and L/sub 2/=5) is chosen.<>
MULTIPAR:一种具有多阶段和复制平面的输出队列ATM模块化交换机
提出了一种新型的输出排队ATM模块化交换机,该交换机具有无记忆两级互连和不连接路径拓扑结构。实现模块化开关的目标是放宽VLSI实现的限制,简化级间布线和同步,从而降低整体开关的复杂性。通过在每个输出端口提供多路径和复制交换模块平面,构建一个纯输出队列。通过选择合适的L/sub 1/和L/sub 2/路径集,可以保证具有一定小区损耗要求的开关。例如,在90%负载下,如果选择一组L/sub 1/=9和L/sub 2/=4(或L/sub 1/=8和L/sub 2/=5),则开关中的单元丢失概率可以保持在10/sup -6/以下。>
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