A simple and high-performance 130 nm SOI eDRAM technology using floating-body pass-gate transistor in trench-capacitor cell for system-on-a-chip (SoC) applications
M. Kumar, M. Steigerwalt, B. Walsh, T.L. Doney, D. Wildrick, K. Bard, D. Dobuzinsky, P. McFarland, C. Schiller, B. Messenger, S. E. Rathmill, A. Gasasira, P. Parries, S. Iyer, S. Chaloux, H. Ho
{"title":"A simple and high-performance 130 nm SOI eDRAM technology using floating-body pass-gate transistor in trench-capacitor cell for system-on-a-chip (SoC) applications","authors":"M. Kumar, M. Steigerwalt, B. Walsh, T.L. Doney, D. Wildrick, K. Bard, D. Dobuzinsky, P. McFarland, C. Schiller, B. Messenger, S. E. Rathmill, A. Gasasira, P. Parries, S. Iyer, S. Chaloux, H. Ho","doi":"10.1109/IEDM.2003.1269312","DOIUrl":null,"url":null,"abstract":"This paper, for the first time, reports a fully-functional 130 nm trench-based eDRAM (embedded DRAM), built in unpatterned SOI. The functionality of the eDRAM is shown by the test results of: (a) 524 Kb ADM (array diagnostic monitors) macros and (b) 16 Mb product macros. The eDRAM functionality is enabled by using low-leakage floating-body array pass transistors. The support logic circuitry of the eDRAM is built using IBM's high-performance 130 nm SOI logic process technology. Wafer fixable yield as high as 67% has been obtained for 524 Kb ADMs. In addition, 16 Mb product macros were built and found to be fully fixable, exhibiting retention time on the order of 80 ms. This technology allows a simple and low-cost integration of trench-based eDRAM with high-performance SOI logic for system-on-a-chip (SoC) applications.","PeriodicalId":344286,"journal":{"name":"IEEE International Electron Devices Meeting 2003","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Electron Devices Meeting 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2003.1269312","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper, for the first time, reports a fully-functional 130 nm trench-based eDRAM (embedded DRAM), built in unpatterned SOI. The functionality of the eDRAM is shown by the test results of: (a) 524 Kb ADM (array diagnostic monitors) macros and (b) 16 Mb product macros. The eDRAM functionality is enabled by using low-leakage floating-body array pass transistors. The support logic circuitry of the eDRAM is built using IBM's high-performance 130 nm SOI logic process technology. Wafer fixable yield as high as 67% has been obtained for 524 Kb ADMs. In addition, 16 Mb product macros were built and found to be fully fixable, exhibiting retention time on the order of 80 ms. This technology allows a simple and low-cost integration of trench-based eDRAM with high-performance SOI logic for system-on-a-chip (SoC) applications.