{"title":"Modified odd-even merge-sort network for arbitrary number of inputs","authors":"C. J. Kuo, Zhi W. Huang","doi":"10.1109/ICME.2001.1237875","DOIUrl":null,"url":null,"abstract":"Modified network architecture for sorting data of any size is presented in this paper. The proposed VLSI archi- tecture is directly modified from the Batcher's odd-even merge-sort network. The major advantage of the proposed architecture is its modular approach, simple and regular interconnection and easy implementation by VLSI technol- ogy.","PeriodicalId":405589,"journal":{"name":"IEEE International Conference on Multimedia and Expo, 2001. ICME 2001.","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Conference on Multimedia and Expo, 2001. ICME 2001.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICME.2001.1237875","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
Modified network architecture for sorting data of any size is presented in this paper. The proposed VLSI archi- tecture is directly modified from the Batcher's odd-even merge-sort network. The major advantage of the proposed architecture is its modular approach, simple and regular interconnection and easy implementation by VLSI technol- ogy.