ELMMA: a new low power high-speed adder for RNS

Abstract

Modular adders are fundamental arithmetic components that are employed in residue number system (RNS) based digital signal processing (DSP) systems. They are widely used in modular multipliers, residue to binary converters and in implementing other arithmetic operations such as scaling. In addition, increasing operating frequencies, as well as a growing demand for portable electronics, have brought power reduction to the forefront of modern design methodologies. Thus, the design of power efficient modular adders is of great significance if RNS circuits are to be utilized in future DSP systems. We propose a new modular adder that is based on the ELM addition algorithm. VLSI implementations using 0.13 /spl mu/m standard-cell technology show that the proposed architecture not only exhibits power efficiency, but also delay /spl times/ area efficiency when compared to existing modular adder designs in the literature.