OPC UA hardware offloading engine as dedicated peripheral IP core

C. Iatrou, L. Urbas
{"title":"OPC UA hardware offloading engine as dedicated peripheral IP core","authors":"C. Iatrou, L. Urbas","doi":"10.1109/WFCS.2016.7496520","DOIUrl":null,"url":null,"abstract":"OPCUA is a promising candidate for achieving a vertical semantic integration of field devices in the next generation of industrial automation topologies. Microprocessing platforms embedded in sensors and actor do however not provide the memory and computing resources required to integrate OPC UA communication stacks. To enable the usage of OPC UA on limited platforms, this article introduces a dedicated, highly scalable hardware server stack, synthesizable on 75.800 μm2 using 28 nm CMOS technology as well as FPGAs, that can process OPC UA as a peripheral component.","PeriodicalId":413770,"journal":{"name":"2016 IEEE World Conference on Factory Communication Systems (WFCS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE World Conference on Factory Communication Systems (WFCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WFCS.2016.7496520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

OPCUA is a promising candidate for achieving a vertical semantic integration of field devices in the next generation of industrial automation topologies. Microprocessing platforms embedded in sensors and actor do however not provide the memory and computing resources required to integrate OPC UA communication stacks. To enable the usage of OPC UA on limited platforms, this article introduces a dedicated, highly scalable hardware server stack, synthesizable on 75.800 μm2 using 28 nm CMOS technology as well as FPGAs, that can process OPC UA as a peripheral component.
OPC UA硬件卸载引擎作为专用外设IP核
OPCUA是实现下一代工业自动化拓扑中现场设备垂直语义集成的一个很有前途的候选者。然而,嵌入在传感器和actor中的微处理平台不能提供集成OPC UA通信栈所需的内存和计算资源。为了使OPC UA能够在有限的平台上使用,本文介绍了一个专用的、高度可扩展的硬件服务器堆栈,可在75.800 μm2上合成,采用28 nm CMOS技术和fpga,可以处理OPC UA作为外围组件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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