Investigating the effects of store value locality on processor power

Abstract

The power requirements of a single workload may vary depending on the program phase, or region. In order to monitor the power dissipation of the processor, multiple power models have been previously proposed. These models rely on the performance counters to estimate the power dissipation of the processor. To the best of our knowledge, this work is the first to investigate the effects of the value of the data being processed in the workload on power. It is shown that the power requirements of the processor correlates with the amount of bit-flips necessary to store a new value over the previous one and considering value locality can improve the power model of store performing instructions to up to 7%. This work shows the limitations of relying solely on performance counters and introduces the need to investigate the data flow of the workload in addition to the control flow, in order to achieve more precise power estimations.