Li Jing-hu, Yu Ming-yan, Wang Yong-sheng, W. Jin-xiang
{"title":"A 1.3 V 30-mW 8-BIT 166-MS/s A/D Converter in 0.18 μm CMOS with Reference Generator","authors":"Li Jing-hu, Yu Ming-yan, Wang Yong-sheng, W. Jin-xiang","doi":"10.1109/SOCC.2006.283866","DOIUrl":null,"url":null,"abstract":"An 8-bit analog-to-digital (A/D) converter from 1.3 V supply voltage in 0.18 mum CMOS technology without use of low-threshold MOS transistor is presented. The A/D converter features a low voltage reference generator, modified pipeline chopper amplifier and pre-equalized comparator. Simulation result shows the A/D converter achieves + 0.17 LSB differential nonlinearity (DNL), + 0.34 LSB integral nonlinearity (INL) and 48 dB SNDR at 166 MHz sampling rate with 1.79 MHZ sinusoidal input. The total power consumption is 30 mW.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283866","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
An 8-bit analog-to-digital (A/D) converter from 1.3 V supply voltage in 0.18 mum CMOS technology without use of low-threshold MOS transistor is presented. The A/D converter features a low voltage reference generator, modified pipeline chopper amplifier and pre-equalized comparator. Simulation result shows the A/D converter achieves + 0.17 LSB differential nonlinearity (DNL), + 0.34 LSB integral nonlinearity (INL) and 48 dB SNDR at 166 MHz sampling rate with 1.79 MHZ sinusoidal input. The total power consumption is 30 mW.