Efficient implementation and stability analysis of a HV-CMOS current/voltage mode stimulator

Abstract

This paper presents an improved version of a reconfigurable current/voltage mode neural stimulator, which can be integrated in multichannel, bidirectional neural interfaces. The current mode stimulator consists of two high voltage (HV) current sources, which provide biphasic stimulation currents of up to 10.2 mA from a ± 9 V supply voltage. In voltage mode, the stimulator has an output range of ±8 V with a resolution of 6 bit. In order to allow voltage mode simulation, a semi-digital feedback loop is used which controls the output current required to achieve the desired stimulation voltage. This allows to fully re-use the HV current sources from the current stimulator and results in class-B operation. Therefore, the power consumption is dominated by the output current and additionally the feedback requires only very little area overhead. Compared to the prior implementation in this work the voltage mode digital to analog converter (DAC) for waveform generation is avoided, by implementing a binary scaled, capacitive level shifter. This reduces the quiescent power by 26 % and reduces the overhead area by 22 %. Additionally, a complete stability analysis based on ΔΣ modulator theory is presented for the first time. The complete frontend including the neural recorder has been layouted for manufacturing in a 180 nm HV CMOS technology.