S. Baumgartner, L. Freitag, H. Paschal, D. Siljenberg
{"title":"An integrated 1.25 Gbit/s laser driver/post amplifer IC","authors":"S. Baumgartner, L. Freitag, H. Paschal, D. Siljenberg","doi":"10.1109/CICC.1997.606576","DOIUrl":null,"url":null,"abstract":"This paper presents the first reported integrated 1.25 Gbit/s post amplifier and laser driver, to the authors knowledge. The post amplifier amplifies 20 mV signals from a pre-amplifier and provides redundant loss of signal detectors. The laser driver provides up to 100 mA DC drive and 25 mA/sub p-p/ C drive. This presents a large on chip isolation challenge and 79 dB of isolation was achieved. The chip has sufficient redundancy and error detection to provide international Class 1 laser safety certification. The chip operated up to 1.6 Gb/s. The design is implemented in a 0.45 um L/sub eff/ BiCMOS technology with 12 GHz NPN's. It is packaged in a 48 lead 7 mm plastic quad flat pack surface mount package.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606576","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents the first reported integrated 1.25 Gbit/s post amplifier and laser driver, to the authors knowledge. The post amplifier amplifies 20 mV signals from a pre-amplifier and provides redundant loss of signal detectors. The laser driver provides up to 100 mA DC drive and 25 mA/sub p-p/ C drive. This presents a large on chip isolation challenge and 79 dB of isolation was achieved. The chip has sufficient redundancy and error detection to provide international Class 1 laser safety certification. The chip operated up to 1.6 Gb/s. The design is implemented in a 0.45 um L/sub eff/ BiCMOS technology with 12 GHz NPN's. It is packaged in a 48 lead 7 mm plastic quad flat pack surface mount package.