{"title":"Stress testing of CdTe solar cells","authors":"P. Meyers, J. Phillips","doi":"10.1109/PVSC.1996.564246","DOIUrl":null,"url":null,"abstract":"CdTe/CdS solar cells have been known to exhibit various combinations of reversible and irreversible degradation of conversion efficiency after being subjected to temperature, voltage and illumination at levels which equal or surpass those expected in field conditions. This paper describes a series of measurements designed to quantify these phenomena. The QE and light and dark J-V characteristics of a set of CdTe devices were measured, then devices were subjected to various combinations of stresses within the parameter space of 0-70 mW/cm/sup 2/ illumination, -0.5 V to +5 mA/cm/sup 2/ electrical bias, and temperatures from 72/spl deg/ to 112/spl deg/C. The device characteristics were measured and changes are interpreted in the context of an equivalent circuit which includes the effects of both the main junction diode, series resistor and a rectifying back contact.","PeriodicalId":410394,"journal":{"name":"Conference Record of the Twenty Fifth IEEE Photovoltaic Specialists Conference - 1996","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Record of the Twenty Fifth IEEE Photovoltaic Specialists Conference - 1996","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PVSC.1996.564246","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
CdTe/CdS solar cells have been known to exhibit various combinations of reversible and irreversible degradation of conversion efficiency after being subjected to temperature, voltage and illumination at levels which equal or surpass those expected in field conditions. This paper describes a series of measurements designed to quantify these phenomena. The QE and light and dark J-V characteristics of a set of CdTe devices were measured, then devices were subjected to various combinations of stresses within the parameter space of 0-70 mW/cm/sup 2/ illumination, -0.5 V to +5 mA/cm/sup 2/ electrical bias, and temperatures from 72/spl deg/ to 112/spl deg/C. The device characteristics were measured and changes are interpreted in the context of an equivalent circuit which includes the effects of both the main junction diode, series resistor and a rectifying back contact.