{"title":"On-die thermal evaluation system","authors":"Suresh Parameswaran, S. Balakrishnan, Boon Ang","doi":"10.1109/MSE.2017.7945085","DOIUrl":null,"url":null,"abstract":"Thermal management of semiconductor chips has become a very critical topic in the industry. In this paper, we present a creative way of designing and using a versatile package-level thermal evaluation vehicle. The topic of thermal management in general and the example of the evaluation tool described in this paper are very relevant to the academic circles too. This paper describes the architecture, implementation, details of operation, programming aspects and usage model of a silicon chip designed as a thermal evaluation tool. This chip was fabricated in 0.18u technology, packaged and characterized. It has a simple implementation and is easy to program, yet has substantial thermal evaluation capabilities. This is an internal tool meant for evaluating our chip architecture, floorplan, packaging & cooling solutions. However, the concept of this thermal chip is applicable for the evaluation of a very wide range of products.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2017.7945085","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Thermal management of semiconductor chips has become a very critical topic in the industry. In this paper, we present a creative way of designing and using a versatile package-level thermal evaluation vehicle. The topic of thermal management in general and the example of the evaluation tool described in this paper are very relevant to the academic circles too. This paper describes the architecture, implementation, details of operation, programming aspects and usage model of a silicon chip designed as a thermal evaluation tool. This chip was fabricated in 0.18u technology, packaged and characterized. It has a simple implementation and is easy to program, yet has substantial thermal evaluation capabilities. This is an internal tool meant for evaluating our chip architecture, floorplan, packaging & cooling solutions. However, the concept of this thermal chip is applicable for the evaluation of a very wide range of products.