Circuitry of Micro-Power JFET and CMOS Input Differential Stages for Op-Amps on Silicon and Wide-Band Semiconductors

Abstract

The study presents an analysis of universal JFET and CMOS differential stages (DS) circuits. Such cascades provide a smaller range of transistor currents (10-100 $\mu$A) compared to classical cascades. The described DSs are implemented on combined process technologies, and therefore can be designed on JFET, BJT or CMOS chips. In addition, gallium arsenide, diamond gallium nitride, thin-film TFT and silicon carbide transistors. A computer simulation of the static modes of the developed DSs and their current dependences is presented. The results of GaAs DS modeling and its frequency dependence are presented.