S. Mukherjee, M. Hibbs-Brenner, J. Skogen, E. Kalweit
{"title":"Fabrication Of MSI Level Transmitter OEICs: A Comparison Between Epl-ln-a-well And The Planar Multifunctional Epistructure (PME) Approaches","authors":"S. Mukherjee, M. Hibbs-Brenner, J. Skogen, E. Kalweit","doi":"10.1109/LEOSST.1992.697451","DOIUrl":null,"url":null,"abstract":"Progress in the fabrication technology for manufacture-compatible monolithic transmitter/transceiver OEICs has been minimal due to the lack of demand and complexity in processing. Simple cosdyield benefit analysis of fabrication approaches [l], however, indicate that monolithic transmitter OEICs may be manufactured with significant cost advantage over hybrid versions provided the OEIC fabrication sequence makes use of well developed, standard IC fabrication processes (e.g., using GaAs ED-MESFET, C-HFET or HBT). Monolithic transmitter/transceiver OEICs for 830 nm have been developed and fabricated for two different application scenarios using standard 3-inch GAS MSUI ED-MESFET processes (Figure 1). The first, aimed at free space optical inte~~~e~t~ and optoelectronic processing, consists of 64 surface emitting LEDs, 64 photodetectors, 1300 FETs and 500 thin-film resistors [2]. The 21 mask fabrication sequence involves embedding the epilayers within an etched well (epi-in-a-well), planarizing the wafer and the processing of FETs and OE devices. The second, aimed at optical interconnects in time division multiplexed computing applications, consists of 2 linear electro-optic waveguide modulators, 3 photodetectors (lateral MSM, PIN and phtoconductive photodetectors), and ED-MESFET circuits (390 FETs/ 6 resistors for the transmitter and 40 FET per PD for the receiver circuits). A novel planar multifunctional epistructure (PME) approach [2], with its associated reduced number of masking steps of 18 (see Figure 2), is used for the fabrication of the transceiver OEICs. The PME approach allows ED-MESFETs to be fabricated on totally planar substrates followed by the creation of the transmitter OE devices. In both the cases, the various photodetectors are made in conjunction with ED-MESFET fabrication. The paper summarizes and compares the two distinctly different approaches, their suitability for manufacture, and the possibility for long-term growth in terms their amenability for the incorporation of other, state-of-the-art devices/circuits, such as VCSELs, edge-emitting laserdamplifer-switches, and C-\"ET and HBT based electronic ICs.","PeriodicalId":355341,"journal":{"name":"Summer Topical Meeting Digest on Broadband Analog and Digital Optoelectronics, Optical Multiple Access Networks, Integrated Optoelectronics, Smart Pixels","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Summer Topical Meeting Digest on Broadband Analog and Digital Optoelectronics, Optical Multiple Access Networks, Integrated Optoelectronics, Smart Pixels","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LEOSST.1992.697451","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Progress in the fabrication technology for manufacture-compatible monolithic transmitter/transceiver OEICs has been minimal due to the lack of demand and complexity in processing. Simple cosdyield benefit analysis of fabrication approaches [l], however, indicate that monolithic transmitter OEICs may be manufactured with significant cost advantage over hybrid versions provided the OEIC fabrication sequence makes use of well developed, standard IC fabrication processes (e.g., using GaAs ED-MESFET, C-HFET or HBT). Monolithic transmitter/transceiver OEICs for 830 nm have been developed and fabricated for two different application scenarios using standard 3-inch GAS MSUI ED-MESFET processes (Figure 1). The first, aimed at free space optical inte~~~e~t~ and optoelectronic processing, consists of 64 surface emitting LEDs, 64 photodetectors, 1300 FETs and 500 thin-film resistors [2]. The 21 mask fabrication sequence involves embedding the epilayers within an etched well (epi-in-a-well), planarizing the wafer and the processing of FETs and OE devices. The second, aimed at optical interconnects in time division multiplexed computing applications, consists of 2 linear electro-optic waveguide modulators, 3 photodetectors (lateral MSM, PIN and phtoconductive photodetectors), and ED-MESFET circuits (390 FETs/ 6 resistors for the transmitter and 40 FET per PD for the receiver circuits). A novel planar multifunctional epistructure (PME) approach [2], with its associated reduced number of masking steps of 18 (see Figure 2), is used for the fabrication of the transceiver OEICs. The PME approach allows ED-MESFETs to be fabricated on totally planar substrates followed by the creation of the transmitter OE devices. In both the cases, the various photodetectors are made in conjunction with ED-MESFET fabrication. The paper summarizes and compares the two distinctly different approaches, their suitability for manufacture, and the possibility for long-term growth in terms their amenability for the incorporation of other, state-of-the-art devices/circuits, such as VCSELs, edge-emitting laserdamplifer-switches, and C-"ET and HBT based electronic ICs.