From software to accelerators with LegUp high-level synthesis

2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES) Pub Date : 2013-09-29 DOI:10.1109/CASES.2013.6662524

Andrew Canis, Jongsok Choi, B. Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, S. Brown, J. Anderson

{"title":"From software to accelerators with LegUp high-level synthesis","authors":"Andrew Canis, Jongsok Choi, B. Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, S. Brown, J. Anderson","doi":"10.1109/CASES.2013.6662524","DOIUrl":null,"url":null,"abstract":"Embedded system designers can achieve energy and performance benefits by using dedicated hardware accelerators. However, implementing custom hardware accelerators for an application can be difficult and time intensive. LegUp is an open-source high-level synthesis framework that simplifies the hardware accelerator design process [8]. With LegUp, a designer can start from an embedded application running on a processor and incrementally migrate portions of the program to hardware accelerators implemented on an FPGA. The final application then executes on an automatically-generated software/hardware coprocessor system. This paper presents on overview of the LegUp design methodology and system architecture, and discusses ongoing work on profiling, hardware/software partitioning, hardware accelerator quality improvements, Pthreads/OpenMP support, visualization tools, and debugging support.","PeriodicalId":354180,"journal":{"name":"2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"59","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CASES.2013.6662524","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 59

Abstract

Embedded system designers can achieve energy and performance benefits by using dedicated hardware accelerators. However, implementing custom hardware accelerators for an application can be difficult and time intensive. LegUp is an open-source high-level synthesis framework that simplifies the hardware accelerator design process [8]. With LegUp, a designer can start from an embedded application running on a processor and incrementally migrate portions of the program to hardware accelerators implemented on an FPGA. The final application then executes on an automatically-generated software/hardware coprocessor system. This paper presents on overview of the LegUp design methodology and system architecture, and discusses ongoing work on profiling, hardware/software partitioning, hardware accelerator quality improvements, Pthreads/OpenMP support, visualization tools, and debugging support.

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从软件到加速器与LegUp高级合成

嵌入式系统设计人员可以通过使用专用硬件加速器来实现节能和性能方面的优势。然而，为应用程序实现自定义硬件加速器可能很困难，而且需要耗费大量时间。LegUp是一个开源的高级综合框架，它简化了硬件加速器的设计过程[8]。使用LegUp，设计人员可以从运行在处理器上的嵌入式应用程序开始，并逐步将程序的部分迁移到FPGA上实现的硬件加速器上。最后的应用程序在自动生成的软件/硬件协处理器系统上执行。本文概述了LegUp设计方法和系统架构，并讨论了正在进行的分析、硬件/软件分区、硬件加速器质量改进、Pthreads/OpenMP支持、可视化工具和调试支持方面的工作。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES)

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