Compiler Assisted Dynamic Scheduling for Multicore Processors

D. Kiran, B. Radheshyam, S. Gurunarayanan, J. P. Misra
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引用次数: 7

Abstract

In this paper, we propose a dynamic and efficient compiler based scheduling algorithm for multicore processors.Here, scheduler takes sub-blocks of a basic block which can be executed independently and maps these sub-blocks on to multiple cores to achieve less execution time. Instructions inside the sub-blocks are in Static-Single Assignment (SSA) form and have only true dependency, but all sub-blocks are disjoint. Scheduler is dynamic because, before mapping subblocks on to cores it checks the register requirement and cycles required for execution of each block and merges the sub-blocks if required which will lead to many outshoots. Despite having a number of new features, this algorithm has admissible time complexity, is economical in terms of the number of core used and is suitable for a wide range of graph structures.
多核处理器的编译器辅助动态调度
本文提出了一种基于编译器的动态高效多核处理器调度算法。这里,调度器将子块的基本块可以独立执行,这些子块映射到多个核心实现减少执行时间。子块中的指令采用静态单赋值(SSA)形式,并且只有真正的依赖关系,但是所有子块都是不相交的。调度器是动态的,因为在将子块映射到内核之前,它会检查每个块执行所需的寄存器需求和周期,并在需要时合并子块,这将导致许多出射。尽管有许多新的特征,但该算法具有可接受的时间复杂度,在使用的核心数量方面是经济的,并且适用于广泛的图结构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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