{"title":"A single-chip 75 GHz/0.35 /spl mu/m SiGe BiCMOS W-CDMA homodyne transceiver for UMTS mobiles","authors":"W. Thomann, V. Thomas, R. Hagelauer, R. Weigel","doi":"10.1109/RFIC.2004.1320528","DOIUrl":null,"url":null,"abstract":"A single-chip, fully-integrated 3G UMTS/W-CDMA transceiver has been implemented in a standard 75-GHz/0.35 /spl mu/m SiGe BiCMOS process for use in FDD mobile terminals. The design comprises two integer-N/fractional-N synthesizers with fully integrated CMOS VCOs, on-chip tuning and PLL, a zero-IF receiver and a direct-conversion transmitter. The zero-IF receiver includes a differential-input, bipolar, low-noise amplifier (2nd LNA), a down-converter with CMOS Gilbert type mixers followed by a low-noise buffer amplifier, an analog active baseband filter of 5th-order with automatic on-chip filter calibration and interleaved with a programmable gain amplifier, and a programmable baseband output buffer. The direct-conversion transmitter includes a 4th-order analog active baseband filter, a bipolar direct modulation up-converter, and a variable gain RF amplifier with >80 dB gain control range, and a 3 dBm power amplifier driver. The transceiver is fully-programmable via two serial 3-wire-bus interfaces.. The device operates at 2.7-3.0 V supply and consumes 35 mA and 53-78 mA, in the receive mode and in the transmit mode, respectively. The transceiver is mounted in a small outline, 40-pin, leadless, 5.5/spl times/6.5 mm/sup 2/ surface mount package and fully complies with ARIB W-CDMA and UMTS standards.","PeriodicalId":140604,"journal":{"name":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","volume":"94 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2004.1320528","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
A single-chip, fully-integrated 3G UMTS/W-CDMA transceiver has been implemented in a standard 75-GHz/0.35 /spl mu/m SiGe BiCMOS process for use in FDD mobile terminals. The design comprises two integer-N/fractional-N synthesizers with fully integrated CMOS VCOs, on-chip tuning and PLL, a zero-IF receiver and a direct-conversion transmitter. The zero-IF receiver includes a differential-input, bipolar, low-noise amplifier (2nd LNA), a down-converter with CMOS Gilbert type mixers followed by a low-noise buffer amplifier, an analog active baseband filter of 5th-order with automatic on-chip filter calibration and interleaved with a programmable gain amplifier, and a programmable baseband output buffer. The direct-conversion transmitter includes a 4th-order analog active baseband filter, a bipolar direct modulation up-converter, and a variable gain RF amplifier with >80 dB gain control range, and a 3 dBm power amplifier driver. The transceiver is fully-programmable via two serial 3-wire-bus interfaces.. The device operates at 2.7-3.0 V supply and consumes 35 mA and 53-78 mA, in the receive mode and in the transmit mode, respectively. The transceiver is mounted in a small outline, 40-pin, leadless, 5.5/spl times/6.5 mm/sup 2/ surface mount package and fully complies with ARIB W-CDMA and UMTS standards.