DFX and Productivity

R. Aitken
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Abstract

CMOS scaling has led to ever-increasing numbers of potentially available transistors on chips. At the same time, design productivity has also continued to improve, but has not been able to keep up, resulting in increasing design effort. Many factors contribute to this situation, but one key element is the complexity involved in ensuring that yield targets will be met. (DFY). This talk outlines the basics of design-for-yield (DFY) and shows how it relates to design-for-manufacturability, test, and variability (DFM, DFT, and DFV respectively). It is shown how a comprehensive approach to all of the problems, known as DFX, can lead to improved design methodology and hence improved productivity.
DFX与生产力
CMOS缩放导致芯片上潜在可用晶体管的数量不断增加。与此同时,设计生产力也在不断提高,但一直跟不上,导致设计工作量不断增加。造成这种情况的因素很多,但一个关键因素是确保达到产量目标所涉及的复杂性。(DFY)。本演讲概述了为产量而设计(DFY)的基础知识,并展示了它与可制造性、测试和可变性(分别为DFM、DFT和DFV)的关系。它显示了如何全面的方法来解决所有的问题,被称为DFX,可以导致改进的设计方法,从而提高生产力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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