Comparison of Multi Chopper Amplifiers for Capacitive MEMS Transducer

Abstract

This paper reports the analysis and comparison of various multi chopper amplifier architectures that are used in capacitive MEMS transducer. The power consumption, Noise density and signal to noise ratio of the chopper amplifiers are the primary focus of this work. These architectures have been implemented in the 130nm technology and the power consumption of these architectures are less than 20μW and input referred noise are less than 20nv/✓***check pdf***Hz. The reported bandwidths of these architectures are between DC to few KHz. The present work also reports the simulated value of CMRR and PSRR for the Dual chopper amplifier that has been implemented in 180nm technology and use the dummy based chopper for reducing the filtering requirement.