A Framework to the Design and Programming of Many-Core Focal-Plane Vision Processors

J. Y. Mori, C. Llanos, M. Hübner
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引用次数: 5

Abstract

The Focal-Plane Image Processing area aims to bring processing elements as near as possible to the pixels and to the camera's focal-plane. Most of the works reported in the literature uses only simple processing elements, in general analog ones, with few flexibility. With the technology advances, a new generation of Vision Processors is emerging. It is expected that multi/many-core systems will be integrated to the pixel sensors, offering several opportunities for parallelism exploration, resulting in high performance and flexible processing systems. The programmability is one of the main problems in this area, since most programmers are not able to create parallel algorithms and applications. In this work, we propose a methodology to the design and programming of many-core focal-plane vision processors. The application is described using a Domain Specific Language, from which the parallelism characteristics are extracted. Afterwards, a new abstract model is derived using techniques such as Program Slicing (PS) and Task-Graph Clustering (TGC). The abstract model is then transformed in a SystemC/TLM2.0 description, in order to allow for different timing accuracy simulations. The results of the simulations are used together with an ASIP design tool in order to determine both the microarchitecture of processing elements and the communication structure of the new system. Finally, from the model derived before, a new source code is generated and programmed into the new platform. In this context, the main concepts and ideas are described in this work, as well as some partial results.
一种多核焦平面视觉处理器的设计与编程框架
焦平面图像处理区域的目的是使处理元素尽可能接近像素和相机的焦平面。文献中报道的大多数工作只使用简单的处理元件,一般是模拟元件,灵活性很少。随着技术的进步,新一代的视觉处理器正在出现。预计多核/多核系统将集成到像素传感器中,为并行性探索提供了一些机会,从而产生高性能和灵活的处理系统。可编程性是该领域的主要问题之一,因为大多数程序员无法创建并行算法和应用程序。在这项工作中,我们提出了一种多核焦平面视觉处理器的设计和编程方法。应用程序使用领域特定语言进行描述,并从中提取并行性特征。然后,利用程序切片(PS)和任务图聚类(TGC)等技术推导出一个新的抽象模型。然后将抽象模型转换为SystemC/TLM2.0描述,以便允许不同的时序精度仿真。仿真结果与ASIP设计工具一起用于确定处理元件的微体系结构和新系统的通信结构。最后,根据之前导出的模型,生成新的源代码,并将其编程到新的平台中。在此背景下,描述了本工作的主要概念和思想,以及一些部分结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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