A. Fontanelli, L. Arnone, R. Branca, Giorgio Mastrorocco
{"title":"Early addressing IC and package relationship allows an overall better quality of complex SOC","authors":"A. Fontanelli, L. Arnone, R. Branca, Giorgio Mastrorocco","doi":"10.1109/ISQED.2000.838864","DOIUrl":null,"url":null,"abstract":"Trends in silicon process and packaging technologies require a tighter integration among manufacturing steps historically well distinct. It is becoming increasingly difficult to design and manufacture the most complex systems-on-a-chip (SOC) without a unified approach which allows taking into account the relationship between the package and the integrated circuits (IC) design flows. We present a new methodology, able to convey board- and package-related information into the classical IC design flow and vice versa. This is the key to ensure the physical implementation is correct the first time, meeting high-density and high-speed design challenges. ICPack (IC & Package Design Integration) is a flexible and adaptable EDA environment, Java- and Web-based, which aims at reducing the number of iterations required to meet the design objectives in terms of quality, reliability, productivity and time to qualification.","PeriodicalId":113766,"journal":{"name":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2000.838864","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Trends in silicon process and packaging technologies require a tighter integration among manufacturing steps historically well distinct. It is becoming increasingly difficult to design and manufacture the most complex systems-on-a-chip (SOC) without a unified approach which allows taking into account the relationship between the package and the integrated circuits (IC) design flows. We present a new methodology, able to convey board- and package-related information into the classical IC design flow and vice versa. This is the key to ensure the physical implementation is correct the first time, meeting high-density and high-speed design challenges. ICPack (IC & Package Design Integration) is a flexible and adaptable EDA environment, Java- and Web-based, which aims at reducing the number of iterations required to meet the design objectives in terms of quality, reliability, productivity and time to qualification.