{"title":"An efficient 210GHz compact harmonic oscillator with 1.4dBm peak output power and 10.6% tuning range in 130nm BiCMOS","authors":"Chen Jiang, A. Cathelin, E. Afshari","doi":"10.1109/RFIC.2016.7508284","DOIUrl":null,"url":null,"abstract":"A compact 210GHz harmonic oscillator is presented. By utilizing a device-centric bottom-up design methodology as well as the return-path gap coupler and self-feeding structure, the harmonic power generation is optimized. Fabricated with a 130nm SiGe BiCMOS process, the oscillator core occupies only 290×95 μm2 area. It achieves a 1.4dBm peak output power and 2.4% peak DC-to-RF efficiency. The output frequency can be tuned from 197.5GHz to 219.7GHz. The phase noise is measured to be -87.5dBc/Hz at 1MHz offset.","PeriodicalId":163595,"journal":{"name":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2016.7508284","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 27
Abstract
A compact 210GHz harmonic oscillator is presented. By utilizing a device-centric bottom-up design methodology as well as the return-path gap coupler and self-feeding structure, the harmonic power generation is optimized. Fabricated with a 130nm SiGe BiCMOS process, the oscillator core occupies only 290×95 μm2 area. It achieves a 1.4dBm peak output power and 2.4% peak DC-to-RF efficiency. The output frequency can be tuned from 197.5GHz to 219.7GHz. The phase noise is measured to be -87.5dBc/Hz at 1MHz offset.