A 1.5 V 86 mW/ch 8-channel 622-3125 Mb/s/ch CMOS SerDes macrocell with selectable mux/demux ratio

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.992103

F. Yang, J. O'Neill, P. Larsson, D. Inglis, J. Othmer

引用次数: 13

Abstract

An 8-channel serial link transceiver realizes 20 Gb/s full duplex total I/O throughput with <700 mW dissipation from a 1.5 V supply and occupies 2 mm/sup 2/ in 0.16 /spl mu/m CMOS. An analog DLL allows tracking of frequency offset up to 400 ppm. The receiver, employing an integrate-and-dump front-end, achieves 30 mVpp sensitivity.

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一个1.5 V 86 mW/ch 8通道622-3125 Mb/s/ch CMOS SerDes macrocell，具有可选的多路/失路比

8通道串行链路收发器在1.5 V电源下实现20gb /s全双工总I/O吞吐量，功耗< 700mw，在0.16 /spl mu/m CMOS中占用2 mm/sup 2/。模拟DLL允许跟踪频率偏移高达400ppm。接收机采用集成转储前端，灵敏度达到30 mVpp。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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